SBCQ              Subtract With Carry with Q register                SBCQ

  Operation:  Q <- - M - 1 + C                             N V - B D I Z C
                                                        / / . . . . / /

 4510 Versions:

  +----------------+-----------------------+---------------+---------+----------+
  | Addressing Mode| Assembly Language Form|    OP CODE    |No. Bytes|No. Cycles|
  +----------------+-----------------------+---------------+---------+----------+
  |ZeroPage Quad   |   SBCQ $FF            |$42 $42 $E5    |    4    |    8r    |
  |Absolute Quad   |   SBCQ $FFFF          |$42 $42 $ED    |    5    |    9r    |
  |(Indirect Quad) |   SBCQ ($FF)          |$42 $42 $F2    |    4    |   10ipr  |
  |[Indirect Quad] |   SBCQ [$FF]          |$42 $42 $EA $F2|    5    |   13ipr  |
  +----------------+-----------------------+---------------+---------+----------+
  i Add 1 if clock speed is at 40 MHz
  p Add 1 if page boundary is crossed.
  r Add 1 if clock speed is at 40 MHz