ASRQ             ASR AND #immediate, LSR accu                      ASRQ

  Operation:  Q <- Q << 1 or M <- M << 1                  N V - B D I Z C
                                                          / . . . . . / /


  4510 Versions:

  +----------------+-----------------------+-----------+---------+----------+
  | Addressing Mode| Assembly Language Form|  OP CODE  |No. Bytes|No. Cycles|
  +----------------+-----------------------+-----------+---------+----------+
  |Accumulator Quad|   ASRQ (A)            |$42 $42 $43|    3    |    3     |
  |ZeroPage Quad   |   ASRQ $FF            |$42 $42 $44|    4    |   12dmr  |
  |ZeroPage Quad,X |   ASRQ $FF,X          |$42 $42 $54|    4    |   12dmpr |
  +----------------+-----------------------+-----------+---------+----------+
  d Sub 1 if CPU is at 3.5 MHz
  m Sub non-bus cycles when at 40 MHz
  p Add 1 if page boundary is crossed.
  r Add 1 if clock speed is at 40 MHz