CLE CLE Extended Stack Disable Flag CLE 4510 Versions: Operation: 0 -> E N V B D I Z C E . . . . . . . 0 +----------------+-----------------------+---------+---------+----------+ | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles| +----------------+-----------------------+---------+---------+----------+ | Implied | CLE | $02 | 1 | 1s | +----------------+-----------------------+---------+---------+----------+ s Instruction requires 2 cycles when CPU is run at 1 MHz or 2 MHZ