INZ                    INZ Increment Index Z by one                   INZ

  Operation:  Z + 1 -> Z                                N V - B D I Z C
                                                        / . . . . . / .

 4510 Versions:

  +----------------+-----------------------+---------+---------+----------+
  | Addressing Mode| Assembly Language Form| OP CODE |No. Bytes|No. Cycles|
  +----------------+-----------------------+---------+---------+----------+
  |  Implied       |   INZ                 |   $1B   |    1    |    1s    |
  +----------------+-----------------------+---------+---------+----------+
  s Instruction requires 2 cycles when CPU is run at 1 MHz or 2 MHZ